rohs 2002/95/ec e 3 pb ds-CPC7556 - r02 www.clare.com 1 bridge characteristics features ? monolithic construction ? surface mount package applications ? telecommunications protection clamp ? high voltage multiplexer/switch ? high voltage esd clamp description 100v diode bridge with an integrated over-voltage protection (ovp) thyristor uses clare's high voltage soi technology. the CPC7556n integrated diode bridge offers protection from high voltage transients by means of an adjustable voltage clamp. the clamp performs two actions, first to limit the voltage across the diode bridge rectified outputs to a value determined by external resistors and the gate voltage and second to fully discharge the v + to v ? outputs when the gate?s trigger threshold is exceeded during the voltage limiting function. the rectified outputs are discharged as a result of the voltage fold-back function of the ovp device. voltage fold back of the ovp circuit will continue until the current through the protector falls below the hold current threshold. terminating the gate to v ? will disable the clamp voltage feature up to the thyristor?s off state voltage. ordering information CPC7556n diagram parameter rating units reverse voltage 100 v forward current 240 ma rms thyristor current 120 ma part description CPC7556n 8-pin soic in tubes (50/tube) CPC7556ntr 8-pin soic tape & reel (1000/reel) + - g a/b b/a a k CPC7556 diode bridge with integrated adjustable ovp circuit
r02 www.clare.com 2 CPC7556 1 specifications 1.1 package pinout 1.2 pin description 1.3 absolute maximum ratings unless otherwise specified all electrical ratings are at 25 ? c 1 derate package for p diss 120 ? c/w. absolute maximum ratings are stress ratings. stresses in excess of these ratings can cause permanent damage to the device. functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. g n /c ~ b n /c n /c ~ a - + 8 1 45 pin# name description 1 ? negative bridge output 2g thyristor gate 3n/c no connection 4+ positive bridge output 5~a input a 6n/c no connection 7n/c no connection 8~b input b parameter symbol minimum maximum units reverse voltage v rrm - 120 v diode forward current (average) i f - 250 ma rms diode forward surge current i fsm -2a gate voltage v gk -4 7 v gate current i gk -20ma overvoltage current i ak - 120 ma thyristor surge current i tsm -1.2a fusing current i 2 t -0.02 a 2 s esd, human body model --3kv junction temperature 1 t j -+150 ? c storage temperature t stg -65 +150 ? c
3 www.clare.com r02 CPC7556 1.4 recommended operating conditions 1.5 general conditions typical values are characteristic of the device at 25 ? c and are the result of engineering evaluations. they are provided for information purposes only and are not part of the manufacturing testing requirements. unless otherwise noted, all electrical specifications are listed for t a =25 ? c. 1.6 dc electrical characteristics parameter symbol minimum maximum units diode forward current (average) i f - 240 ma rms reverse voltage v r - 100 v operating temperature range t a -40 +125 ? c thermal impedance ? ja 120 - ? c/w parameter conditions symbol minimum typical maximum units diode bridge characteristics: forward current - i f - - 240 ma rms diode forward voltage drop i f = 40ma v f 0.83 0.91 0.97 v i f = 250ma 1 1.3 1.49 reverse voltage leakage current v r = 100v i r --1 ? a thyrister characteristics: gate trigger current v +/ ? = v ak = 10v, i ak = 110ma i gt 0.5 1.2 1.8 ma gate trigger voltage v gk 2.5 2.8 3.2 v trigger current - i akt -2540ma hold current - i h 70 100 - ma peak off state voltage v gk = 0v, i ak = 5 ua v drm 110 - - v
r02 www.clare.com 4 CPC7556 1.7 ac electrical characteristics 2 typical performance data parameter conditions symbol minimum typical maximum units input zero bias capacitance v + ? v ? = 0v measured from v ~a to v ~b c ~a~b -4.412pf output zero bias capacitance v ~a = v ~b measured from v + to v ? c +/ ? -8.320pf bridge zero bias capacitance v + ? v ? = 0v measured from v ~a to v +/- and v ~b to v +/- c ~a/+ , c ~a/ ? , c ~b/+ , c ~b/ ? -8.512pf thyristor peak pulse discharge energy single event over-voltage discharge energy e pp - - 300 mj thyristor repeated discharge energy allowable repeated discharge energy, rectified 60hz e ave --14mj 2. 8 2.6 2.4 2.0 1. 8 1.6 -20 20 60 -40 0 40 8 0 temperature (oc) diode forward volta g e (v) brid g e forward volta g e (v f ) vs. temperature 100 1.4 1.2 1.0 i f =250ma i f =40ma 2.2 1.6 1.4 1.2 1.0 0. 8 0.6 -20 20 60 -40 0 40 8 0 temperature (oc) diode forward volta g e (v) diode forward volta g e (v f ) vs. temperature 100 0.4 0.2 0 i f =250ma i f =40ma 152 150 14 8 146 144 142 -20 20 60 -40 0 40 8 0 temperature (oc) reverse breakdown volta g e (v) diode reverse breakdown volta g e (v rrm ) vs. temperature 100 140 13 8 3.0 2.5 2.0 1.5 1.0 -20 20 60 -40 0 40 8 0 temperature (oc) gate tri gg er current (ma) gate tri gg er current vs. temperature 100 0.5 0 3.4 3.2 3.0 2. 8 2.6 2.4 -20 20 60 -40 0 40 8 0 temperature (oc) gate tri gg er volta g e (v) gate tri gg er volta g e vs. temperature 100 2.2 2.0
5 www.clare.com r02 CPC7556 3 manufacturing information 3.1 moisture sensitivity all plastic encapsulated se miconductor packages are susceptible to moisture ingression. clare classified all of its plastic encapsulated device s for moisture sensitivity according to the latest version of the joint industry standard, ipc/jedec j-std-020 , in force at the time of product evaluation. we test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and informat ion in that standard as well as to any limitations set forth in the information or standards referenced below. failure to adhere to the warnings or limitations as establ ished by the listed specificati ons could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. this product carries a moisture sensitivity level (msl) rating as shown below, and should be handled according to the requirements of the latest version of the joint industry standard ipc/jedec j-std-033 . 3.2 esd sensitivity this product is esd sensitive , and should be handled according to the industry standard jesd-625 . 3.3 reflow profile this product has a maximum body temperature and time rating as shown below. all other guidelines of j-std-020 must be observed. 3.4 board wash clare recommends the use of no-clean flux formulations. however, board washing to remove flux residue is acceptable. the use of a short drying bake may be necessary if a wash is used after solder reflow processes. chlorine-based or fluorine-based solvents or fluxes shoul d not be used. cleaning methods that employ ultrasonic energy should not be used. device moisture sensitivity level (msl) rating CPC7556n msl 1 device maximum temperature x time CPC7556n 260 ? c for 30 seconds rohs 2002/95/ec e 3 pb
r02 www.clare.com 6 CPC7556 3.5 8-pin soic package dimensions 3.6 tape & reel dimensions dimensions mm mi n / mm max (inches mi n / inches max) pcb land pattern 1.524 / 1.727 (0.060 / 0.06 8 ) 0.533 ref (0.021 ref) 0.1016 / 0.24 8 9 (0.0040 / 0.009 8 ) 4. 8 01 / 4.97 8 (0.1 8 9 / 0.196) pi n 1 0.356 / 0.457 (0.014 / 0.01 8 ) 5. 8 014 / 6.1976 (0.22 8 4 / 0.2440) 3. 8 10 / 3.9 88 (0.150 / 0.157) 1.27 typ (0.05 typ) 0.406 / 1.270 (0.016 / 0.050) 0.1905 / 0.24 8 9 (0.0075 / 0.009 8 ) 1.372 / 1.575 (0.054 / 0.062) 1.27 (0.050) 5.30 (0.209) 1.50 (0.059) 0.60 (0.024) dimensions mm (inches) note: tape dimensions not sho w n comply w ith jedec standard eia-4 8 1-2 em b ossment em b ossed carrier to p c o v er tape thickness 0.102 max. (0.004 max.) 330.2 dia. (13.00 dia.) k 0 = 2.10 (0.0 8 3) w =12.00 (0.472) b 0 =5.30 (0.209) user direction of feed a 0 =6.50 (0.256) p= 8 .00 (0.315) for additional information please visit our website at: www.clare.com clare, inc. makes no representations or warranties with respect to the accuracy or completeness of the contents of this publica tion and reserves the right to make changes to specifications and product descriptions at any time without notice. neither circuit patent licenses nor indemnity are expressed or implied. except as set forth in clare?s standard terms and conditions of sale, clare, inc. assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. the products described in this document are not designed, intended, authorized or warranted for use as components in systems in tended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of clare?s product may result in direct physical harm, i njury, or death to a person or severe property or environmental damage. clare, inc. reserves the right to discontinue or ma ke changes to its products at any time without notice. specification: ds-CPC7556 - r02 ?copyright 2011, clare, inc. all rights reserved. printed in usa. 8/17/2011
|
